An Overview of Static Power Dissipation

Power consumption is an increasingly important issue in general purpose processors, particularly in the mobile computing segment. In present processors, most of the power dissipation is dynamic power dissipation, which arises due to signal transitions. Various techniques have been studied and implemented to reduce dynamic power dissipation, including clock gating, cache sub-banking, voltage scaling, and eliminating needless computation (these techniques are directly relevant to computer architects). However, as transistors become smaller and faster, static power (also called leakage power) dissipation will become increasingly significant. Technology scaling is increasing both the absolute and relative contributions of static power dissipation. Looking at current technology trends, it is evident that static power dissipation is growing at a faster rate than dynamic power dissipation. In just a few processor generations, the curves will intersect. Using scaling theory, Borkar predicts that leakage power increases by 5 times every generation, while active power remains roughly constant. Because leakage current flows from every transistor that is powered on, with increasing die sizes and integration, static power will become a significant part of the total power.